SPI and I2C communications affected by IC communication failure

This post describes the impact of an IC communication failure on SPI and I2C communications.

SPI and I2C communications are often used between microcontrollers and peripheral ICs in embedded products. The following is a brief introduction to SPI and I2C communications. For more details, please refer to the separate study.

ItemSPI(Quad SPI is not included)I2C
Communication methodSynchronous Serial Communications
Full duplex
Synchronous Serial Communications
Half duplex
Communication lineSCLK (Clock)
MOSI (Master-Out、Slave-In Data)
MISO (Master-In、Slave-Out Data)
SS (Slave Select)
SCL (Clock)
SDA (Data)

Communication sequence1. SS “Low” output from Master.
2. SCLK output from Master.
3. MOSI(Data) output synchronized with SCLK for Master.
4. MISO(Data) output synchronized with SCLK for Slave.
1.SDA((Slave address or data)) output from Master.
2. SCL output immediately after SDA output for Master.
3. Slave is SDA output (ACK and data) in line with Master’s SDA.

As shown in the figure, in SPI and I2C communication, a microcontroller (MCU) is the master and IC ABC and IC DEF are connected as slaves. If the communication function of IC ABC fails, the communication with each pin of the MCU and IC DEF may be affected. In such a case, the effects on SPI and I2C communication are as follows.

SPI communication is not likely to affect the MCU’s SPI function and communication with IC DEF by fixing SS-ABC to “Hi”.
I2C communication may affect the MCU’s I2C function and communication with IC DEF.

(Reference Note)
In AUTOSAR, there is a specification for SPI communication, but no specification for I2C communication; if I2C communication is to be implemented, it must be implemented independently as a Complex Device Driver. This is the reason why SPI communication is often used in products that apply functional safety standards.

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